Hyper-Q and Alink are currently the only FPGA products that support the Taiwan Stock Exchange. No matter in market or FIX trading, they have been online for a long time and are mature products. Our R&D team is composed of members from well-known chip design companies. This is the first successful case of combining FPGA and financial transactions in Taiwan.
Hyper-Q is a server for Taiwanese stock market, which processes the data packet by FPGA, it almost completes the processed data packet structure without consuming Latency (only PCIE processing time), allowing users to connect the API more easily.
Alink is a Tick to Trade solution that combines quote obtainment and order placement. The latency consumed when placing an order is less than 1μ. By using the Alink APIs, users can easily expand their confidential strategy code in user space and send orders to Alink-O which is a FIX gateway accelerator, be responsible for speeding your orders to Exchange .
HYPER-Q is the first Taiwanese stock quoting product, it receives TWSE data packet instantly, and it DMA to the main memory 10 times faster than the speed of software. The data packet will be copied for each market, and users can decide how to subscribe the data packet according to the number of CPU cores.
Through the API, developers can easily adapt to HyperQ API to save them development time and expand that key functionality works effectively.
Parallel computing is a type of calculation. Through parallel computing, multiple calculations or multiple execution programs can be processed simultaneously. Generally, complex work can be divided into smaller working items, so these small working items can be processed at the same time by parallel calculation. There are several different forms of parallel computing: bit-level, instruction set level, parallelization of data, and task. For a long time, parallel computing has been used in high-performance computing. FPGA plays an exceptionally good and can be extended for other solutions, these are the advantages of FPGA.
• FPGA can calculate accurate time consumption, which means that FPGA has no jitter problem and its reaction time is accurate and predictable. This part of the operating system is exactly the opposite of the FPGA solution. The programs running on the operating system may be interrupted by the CPU scheduler or hardware IO.
• This causes the processing time to become unpredictable with the problem of jitter, which is why latency appears to move up and down in the operating system.
Through HYPER-Q, FPGA will filter the quotation data, only the best five market prices and transaction details will be transferred to the main memory through DMA; At the same time, the simplified quotation data structure allows users to process the data more efficiently according to the CPU structure.
• FPGA will convert the quotation data into a quote data structure designed by Hypershark. The data structure does not exceed 64 bytes. This design is to make the CPU process more efficient.
• Through the Hyper-Q API, users have various applications, such as quote transfer, program trading, proprietary trading, and market-making. In every single market, Hyper-Q will copy multiple set of data, users can decide the multiplex process according to the number of CPU cores.
HyperShark's market solution, HYPER-Q, is designed for the Taiwan Stock Exchange. The data filtering, data decoding, and the design from DMA to the main memory of this product are all completed by FPGA. By simplifying the data packet structure, user space can achieve more efficiency and lower latency.
We use pure Verilog programming on the FPGA, Verilog is a low-level hardware language, it is currently the most efficient option.
We have built a very unique test environment for FPGA solutions that can accurately measure the exact delay time of each packet.
We recruited professionals from IC design companies, most of whom understand the characteristics of the financial market and know how to solve the bottleneck
We know how to obtain the best solution between software and hardware. According to our years of experience, integrating all the solutions in the hardware is not always the best solution.
First, hardware development time is long. Second, the cost is high, so it becomes very important to place FPGA in the most efficient place.
The Alink system is composed of two FPGA subsystems: Hyper-Q / Alink-O.
Hyper-Q is responsible for parsing the UDP packets from stock exchange (TWSE), filtering and decoding to form a streamlined quote structure, which is passed to the main memory for software use. This part can refer to the detailed introduction of Hyper-Q.
Alink-O mainly processes orders through FPGA, the tasks in Alink-Q cover risk checking, FIX format conversion and sending orders to Exchange, besides, both execution report and drop copy are both included in FPGA functionalities.
Alink-O Itself can be described as a FIX Gateway accelerator.
Verilog is a low-level programming language. Among the programming languages that FPGA is compatible with, Verilog has a great advantage comparing to the other. The Alink System is completely written in Verilog .
FPGA receives and processes data at the same time. It processes network packets in parallel, speeding up pending time for packets. When the data packet DMA is transferred to the main memory, the market data are copied three times to speed up the strategy program.
FPGA handles the FIX format and conversion, and it implements the FIX protocol in series with the exchange FIX Gateway. The overall processing speed is only 300 nanos in a 100M environment.
Each buys and sells order will check the quota and inventory position.
The link system requires only 1.1μs of internal processing time from receiving the market data to placing an order, and it does not cover the strategy time. For example, the time consumed by software with the same architecture is shortened by at least 10 to 25μs.
• User interface can input FPGA controlling parameters, such as FIX Session management, risk control parameter values, transaction related parameters, etc.
• Alink system supports both TSE and OTC markets, currently, the only FPGA in the Taiwan market supports orders.
• Alink system supports stocks, ETFs, and warrants.
• It can also provide drop copy information.
• It can upload commission information in batches.
• Through the user interface, users can transparently obtain risk control value and real-time order-stopping function.
• Users can remotely monitor the execution status of the system to ensure the normality of data or related maintenance of programs.
• Real-time FIX line status update.
• Update the risk control value in real-time, users can transparently understand the risk control information from the outside.
• It provides external emergency stopping function.
The cost of laboratories, simulation products and hardware equipment, plus R&D expenses of software and hardware, is several times higher than that of pure software R&D.
It needs to cross fields finance and FPGA to improve the success rate of FPGA projects. It requires software and hardware experts to cooperate, test, and verify. However, experts in writing Verilog and software and firmware are hard to find.
Comparing to software, Verilog may require 10 times the programming amount for the same function. Alink is an FPGA product developed by pure Verilog. The product needs to be mature and stable, and the program volume and difficulty are higher.
The test simulation program needs to cover Verilog simulator and software verification test. The compatibility test of the carrier also needs to be considered, and the types of problems that need to be checked in verification are relatively complicated.
The product has been online, it has the practical experience and it is a mature product.
It completes a simulated exchange environment for simulation
The most stable FPGA solution has experienced various market situations.